SAM L10/L11 Internal SRAM

Internal SRAM Description

SAM L10/L11 devices embed 4 kB, 8 kB, or 16 kB of internal SRAM mapped at address 0x20000000.

SRAM retention is guaranteed for Watchog, External and System Reset resets. However, the first two 2 kB of SRAM are reset by the Boot ROM.

Internal SRAM Characteristics:

  • Up to 16 kB SRAM
  • Privileged access for Core, DSU, DMA
  • Four levels Quality of Service (QoS) for concurrent accesses
    • DISABLE
    • LOW
    • MEDIUM
    • HIGH
  • Divided in sub-blocks of 4 kB (to optimize power consumption)
    • SRAM can be partially retained in STANDBY by using the SRAM Power Switch in the Power Manager (PM)
  • Support Secure/Non-Secure regions' configuration for Arm® TrustZone® technology (SAM L11 only)
saml10-internal-sram.png

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